METHOD OF REDUCING INTERCONNECT LINE TO LINE CAPACITANCE BY USING A LOW K SPACER
摘要
<p>A method is described of reducing the line to line capacitance within semiconductor devices and a device demonstrating the same. The device includes a spacer layer disposed between an etch stop material and a conductive layer. Separating the etch stop layer from the conductive layers by the spacer layer may decrease the line to line capacitance significantly in a semiconductor device.</p>
