| 摘要 |
<p>A semiconductor memory device having capacitor-less dynamic memory cells is provided to reduce an error rate of the memory device by accumulating holes for redundancy memory cell arrays. A semiconductor memory device includes a normal memory cell array(20), a redundancy memory cell array(10), and a controller(31). The normal memory cell array includes normal memory cells, which include a floating body and store data. The floating body includes a gate, which is connected to a normal word line, a first electrode, which is connected to a bit line, and a second electrode, which is a source line. The redundancy memory cell array includes redundancy memory cells, which include a floating body and store data. The floating body includes a gate, which is connected to a redundancy word line, a first electrode, which is connected to a bit line, and a second electrode, which is a source line. The controller applies a first control voltage to the normal word line and a second control voltage to the redundancy word line. The second control voltage is different from the first control voltage.</p> |
