STATIC RANDOM ACCESS MEMORY MEANS

摘要

A static random access memory means is provided. The SRAM memory means comprises a first pass-gate FET (T6) which is coupled between a first node (A) and a bitline-bar (BLB). A second pass-gate FET (T1) is coupled between a second node (B) and a bitline (BL). The second node (B) is coupled to the first pass-gate FET (T6) and the first pass- gate FET (T6) is switched according to the voltage (V_B) at the second node (B). The first node (A) is coupled to the second pass-gate FET (T1). The second pass-gate FET (T1) is switched according to the voltage (V_A) on the first node (A).