发明名称 FAILURE DETECTION APPARATUS OF INVERTOR
摘要 <P>PROBLEM TO BE SOLVED: To realize a failure detection apparatus of the three-phase PWM inverter in which the need for a high-speed A/D converter is eliminated, and in addition, the voltage utilization factor of bus bar voltage can be increased. <P>SOLUTION: The failure detection apparatus is provided with a busbar voltage monitor circuit 56 for supervising bus bar voltage of a three-phase PWM inverter 52, an output voltage monitor circuit 55a for adding the output voltage of each phase of the three-phase PWM inverter 52 to additionally output the added output voltage via a filter, having low-pass characteristics with a cut-off frequency lower than the PWM carrier frequency, and a trouble determining means 60a for determining the three-phase PWM inverter 52 in trouble when an output voltage value output from the output voltage monitor circuit 55a is substantially equal to the voltage value, corresponding to 3/2 times the busbar voltage monitored by the busbar voltage monitoring circuit 56. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007289000(A) 申请公布日期 2007.11.01
申请号 JP20070206848 申请日期 2007.08.08
申请人 MITSUBISHI ELECTRIC CORP 发明人 KIFUKU TAKAYUKI;MATSUSHITA MASAKI
分类号 H02M7/48 主分类号 H02M7/48
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