| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce power consumption while to reduce the size of chips in a semiconductor memory device adopting a negative word line system. <P>SOLUTION: The semiconductor memory device relating to one embodiment of this invention has a memory cell array 10 having a plurality of memory cell units in which a plurality of electrically re-writable memory cells formed on a semiconductor substrate are connected in series, a plurality of word lines 14 connected respectively to control gates of the plurality of memory cells, bit lines 17 connected to one end of the memory cell units, and source lines connected to the other ends of the memory cell units, and the semiconductor memory device is characterized in that it has a potential generating circuit 19 connected to the word lines 14 via a word line device 15 and connected to the control gates of the plurality of memory cells, and a capacitor 20 supplying internal voltage generated by the potential generating circuit 19. <P>COPYRIGHT: (C)2008,JPO&INPIT |
