发明名称 Pseudo SRAM with common pad for address pin and data pin
摘要 Provided are a semiconductor memory device and a driving method thereof, which can reduce power consumption and operation delay time by preventing an overlapped driving of word lines. The pseudo SRAM includes: an address input unit for receiving an address through a pin and outputting the received address as an internal address; a transition detecting unit for detecting a transition of the internal address; a word line (WL) driving signal generating unit for generating a WL driving signal in response to an output signal of the transition detecting unit; and a control signal generating unit, in response to a pin select signal, for generating a first control signal for controlling the address input unit to output only an valid address as the internal address, and a second control signal for controlling the WL driving signal generating unit to activate the WL driving signal.
申请公布号 US7286440(B2) 申请公布日期 2007.10.23
申请号 US20050146042 申请日期 2005.06.07
申请人 HYNIX SEMICONDUCTOR, INC. 发明人 YOO SEONG-NYUH
分类号 G11C8/00 主分类号 G11C8/00
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