| 摘要 |
<p>The arrangement has an open drain circuit (1) to apply a signal depending on a condition of an input signal (in) at nodes. An output signal is outputted depending on the condition of a node. An evaluating logic (3) is arranged downstream to a load (2), where the evaluating logic provides/supplies the output signal for evaluating the condition of the nodes. The open drain circuit applies the input signal to a transistor (T1) e.g. P-type MOS transistor.</p> |
