| 摘要 |
The present invention facilitates semiconductor fabrication by providing methods of fabrication that tailor applied strain profiles to channel regions of transistor devices. A strain profile is selected for the channel regions ( 104 ). Recessed regions are formed ( 106 ) in active regions of a semiconductor device after formation of gate structures according to the selected strain profile. A recess etch ( 106 ) is employed to remove a surface portion of the active regions thereby forming the recess regions. Subsequently, a composition controlled recess structure is formed ( 108 ) within the recessed regions according to the selected strain profile. The recess structure is comprised of a strain inducing material, wherein one or more of its components are controlled and/or adjusted during formation ( 108 ) to tailor the applied vertical channel strain profile.
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