| 摘要 |
PROBLEM TO BE SOLVED: To provide a manufacturing method that can precisely and easily manufacture an insulated gate semiconductor device avoiding local electric field concentration near the lower end of a gate electrode. SOLUTION: A semiconductor device 100 has a three-layer structure for an insulating layer 23 located below a gate electrode 22, the three-layer structure of a thermally-oxidized film 231 (a first layer), an NSG film 232 (a second layer), and a PSG film 233 (a third layer) in order from a wall surface side of a trench. In other words, the insulating layer 23 increases its wet-etching speed towards central part of a gate trench 21 in the widthwise direction. Accordingly, if an etch-back is done by wet-etching, a space formed of a projection is produced. A gate electrode 22 is formed within this space. This will bring about a formation of the bottom at the gate electrode 22 that slowly terminates in a depth direction. Consequently, in the semiconductor device 100, a local electrical field concentration is alleviated near the bottom of the gate electrode 22. COPYRIGHT: (C)2008,JPO&INPIT
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