发明名称 |
Semiconductor Storage Device |
摘要 |
A semiconductor storage device according to the present invention comprises one or more memory planes 8 comprising a plurality of memory blocks 9 , and a block selection circuit for decoding an block address signal for selecting the memory block 9 from the memory plane 8 to select the memory block, generates a dummy block address for selecting a dummy block that is different from the selected block address and a defective block address of a defective block by a predetermined logical operation targeted for a specific partial bit in address bits of the selected block address when the defective block is contained in the memory plane. A bit line connected to the selected memory cell selected by the selected block address and a bit line in the dummy block are connected to differential input terminals of a sense amplifier circuit 9.
|
申请公布号 |
US2007230245(A1) |
申请公布日期 |
2007.10.04 |
申请号 |
US20050589066 |
申请日期 |
2005.02.09 |
申请人 |
WATANABE MASAHIKO;MORI YASUMICHI |
发明人 |
WATANABE MASAHIKO;MORI YASUMICHI |
分类号 |
G11C29/04;G11C8/12;G11C16/08;G11C16/28;G11C29/00 |
主分类号 |
G11C29/04 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|