发明名称 Semiconductor memory device
摘要 A semiconductor memory device includes: a memory cell array; a sense amplifier circuit for reading and writing data of the memory cell array page by page; a verify-judge circuit configured to judge write or erase completion based on the verify-read data held in the sense amplifier circuit; and data latches disposed for the respective columns in the memory cell array to be attached to the verify-judge circuit, into which column separation data are written to serve for excluding the corresponding columns from a verifying object, wherein the column separation data are automatically set in the data latches in an initial set-up mode at a power-on time so that at least a part of inaccessible columns for users are excluded from the verifying object.
申请公布号 US7277325(B2) 申请公布日期 2007.10.02
申请号 US20060412938 申请日期 2006.04.28
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 FUKUDA KOICHI;MOROOKA MIDORI;DOHMAE HIROYUKI
分类号 G11C16/06 主分类号 G11C16/06
代理机构 代理人
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