发明名称 Circuits and methods for reducing static phase offset using commutating phase detectors
摘要 Embodiments of the present invention reduce static phase offset in timing loops. In one embodiment, the present invention includes a timing loop comprising first and second phase detectors, wherein during a first time period, the first phase detector is coupled in a closed timing loop and the second phase detector is decoupled from the closed timing loop and calibrated, and during a second time period, the second phase detector is coupled in a closed timing loop and the first phase detector is decoupled from the closed timing loop and calibrated.
申请公布号 US7276977(B2) 申请公布日期 2007.10.02
申请号 US20050200472 申请日期 2005.08.09
申请人 SELF PAUL WILLIAM RONALD 发明人 SELF PAUL WILLIAM RONALD
分类号 H03L7/07 主分类号 H03L7/07
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