发明名称 DELAY ANALYSIS PROGRAM, RECORDING MEDIUM RECORDED WITH THIS PROGRAM, DELAY ANALYSIS METHOD AND DELAY ANALYSIS DEVICE
摘要 PROBLEM TO BE SOLVED: To mitigate the burden of a designer and to shorten a design period by sufficiently and accurately performing the circuit delay of a circui to be analyzed. SOLUTION: The delay analysis device 500 accepts the input of the timing analysis result of an analysis object circuit 300, and a detection part 502 detects a critical path from the input timing analysis result. Then, a mean delay distribution calculation part 503 calculates the mean delay distribution of the other paths other than the critical path among all paths in the analysis object circuit 300 based on the mean delay value of each critical path. Then, a first probability density distribution calculation part 504 calculates the probability density distribution of the critical path, and a second probability density distribution calculation part 505 calculates the probability density distribution of all the paths from the mean delay distribution. Then, a difference calculation part 506 calculates a difference between the statistical delay value of the critical path and the statistical delay value of all the paths based on the probability density distribution of the critical path and the probability density distribution of all the paths. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007233550(A) 申请公布日期 2007.09.13
申请号 JP20060052430 申请日期 2006.02.28
申请人 FUJITSU LTD 发明人 HONMA KATSUMI;SHIBUYA TOSHIYUKI;MATSUOKA HIDETOSHI;NITTA IZUMI
分类号 G06F17/50 主分类号 G06F17/50
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