| 摘要 |
The arrangement has a data processor (1) connected to a first bus system (10) for transmitting signals at a first frequency, a functional unit (2) with an integral memory connected to a second bus system (20) for transmitting signals at a different frequency and a transfer unit (3) connected via the bus systems to the data processor and functional unit for transferring and converting signals and electrically decoupling the bus systems. |
