发明名称 Gate layouts for transistors
摘要 A transistor and a method of fabricating the transistor are provided. The transistor includes a semiconductor material comprising drain regions and source regions formed in alternating rows or columns. The transistor also includes polysilicon chains overlaying the top of the semiconductor material, disconnected from and substantially parallel to one another, and separating the drain regions from the source regions. The method includes providing a semiconductor material, growing a first insulating layer on top of the semiconductor material, depositing a polysilicon layer on top of the first insulating layer, defining a plurality of chains in the polysilicon layer, the plurality of chains being disconnected from and substantially parallel to one another, and forming a plurality of drain regions and a plurality of source regions in the semiconductor material in alternating rows or columns. The plurality of chains separates the plurality of drain regions from the plurality of source regions.
申请公布号 US7265041(B2) 申请公布日期 2007.09.04
申请号 US20050311995 申请日期 2005.12.19
申请人 MICREL, INC. 发明人 WU SCHYI-YI;YOO JI-HYOUNG
分类号 H01L29/74;H01L27/082;H01L27/102;H01L29/70;H01L31/11;H01L31/111 主分类号 H01L29/74
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