| 摘要 |
A method for manufacturing a flash memory device is provided to prevent mutual interference between bit lines and to improve reduction of cell current and operation speed by using a step between and bit lines. A contact is formed on a predetermined region of a first interlayer dielectric(103) on a semiconductor substrate(101) having a lower structure. The contact where a first bit line is formed in the contact is etched to form a first trench. A first conductive material is gap-filled in the first trench to form a first bit line(105). A second interlayer dielectric(106) is formed on the portion of the first interlayer dielectric, the contact, and the first bit line. A region where a second bit line is formed in the second interlayer dielectric is etched to form a second trench. A second conductive material is gap-filled in the second trench to form a second bit line(107). The second bit line has a step with respect to the first bit line.
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