FIRMWARE SOCKET MODULE FOR FPGA-BASED PIPELINE PROCESSING

摘要

A firmware socket module is deployed on a reconfigurable logic device, wherein
the firmware socket module has a communication path between itself and an
entry point into a data processing pipeline, wherein the firmware socket
module is configured to provide both commands and target data to the entry
point in the data processing pipeline via the same communication path, wherein
each command defines a data processing operation that is to be performed by
the data processing pipeline, and wherein the target data corresponds to the
data upon which the data processing pipeline performs its commanded data
processing operation. Preferably, the firmware socket module is configured to
provide the commands and target data in a predetermined order that is
maintained throughout the data processing pipeline. Also, the firmware socket
module may be configured to (1) access an external input descriptor pool
buffer that defines the order in which commands and target data are to be
provided to the data processing pipeline, and (2) transfer the commands and
target data from an external memory to the data processing pipeline in
accordance with the identified defined order. Results of the processing by the
data processing pipeline are also returned to external memory by the firmware
socket module, whereupon those results can be subsequently used by software
executing on a computer system.