| 摘要 |
PROBLEM TO BE SOLVED: To provide an elastic store circuit capable of correcting phase difference between input and output timings without stopping input data or output data. SOLUTION: A phase stability monitoring portion 19 monitors phase difference and stability of a timing S3 and a timing S6, and outputs a correction notification signal having (a) steps in front or (b) steps in back when input and output clocks are in a stable state and the phase difference is n/2±2 or more. Upon receipt of the correction notification signal, a phase correcting portion 18 switches data to be outputted to an input data holding portion 12 according to a period timing for holding data held by the input data holding portion 12, based on the number of steps to be corrected. Upon receipt of the correction notification signal, a counter 15 operates only its period by "n-a" clock period in forward correction or by "n+b" clock period in backward correction. COPYRIGHT: (C)2007,JPO&INPIT
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