| 摘要 |
<P>PROBLEM TO BE SOLVED: To suppress the influence of a PLL loop filter upon a modulation signal. <P>SOLUTION: An operational amplifier 10 has an input signal being input to an inverted input terminal via a first resistor R1. A second resistor R2 is provided in a feedback route between the output terminal and the inverted input terminal of the operational amplifier 10. A VCO 12 has an input of a control voltage Vcnt being output from the operational amplifier 10. A frequency divider 14 frequency divides the output signal Sout of the VCO 12. A phase comparator 16 compares the output signal of the frequency divider 14 with a reference clock signal, and outputs a voltage corresponding to a phase difference. A loop filter 18 eliminates high frequency component in the output voltage Vcp of the phase comparator 16, so as to output to a non-inverted input terminal of the operational amplifier 10. <P>COPYRIGHT: (C)2007,JPO&INPIT |
