| 摘要 |
Shorting bars (18) are provided for electrostatic discharge protection as a portion of trace (10, 12) deposition in a photodiode array. During normal processing for etching of the metal layers, the shorting bars are removed without additional processing requirements. Additional shorting elements are provided by employing FET silicon layers (40, 42, 44) having traces (54) in contact with the array traces to provide extended ESD protection until removal of those shorting elements during normal processing for opening vias for photodiode bottom contact. |
