| 摘要 |
An apparatus and a method for controlling a bank of a semiconductor memory are provided to prevent address generation error by easily assuring timing margin through an address latching method. An apparatus for controlling a bank of a semiconductor memory includes a plurality of banks(100~400). A peripheral circuit(50) generates a bank selection signal and a first address. A bank control unit(500~800) generates a second address by correcting the first address to be appropriate for bank control timing, and then outputs the second address to a bank according to the bank selection signal. A column control unit(110~140) controls data input/output of a corresponding bank according to the second address.
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