发明名称 All digital implementation of clock spectrum spreading (dither) for low power/die area
摘要 A digital circuit configured to spread a clock train spectrum includes a clock configured to generate the clock train, and a variable divider configured to divide the frequency of the clock train by a temporally-varying-divider value to modulate the clock train and generate a dithered clock train. The circuit further includes a first accumulator configured to accumulate the dithered clock train to generate a frequency modulation waveform, and a second accumulator configured accumulate the frequency modulated waveform to generate a phase modulation signal. The circuit further includes a phase-value calculator configured to calculate the temporally-varying divider value based on the phase modulation signal; and a closed-loop control circuit configured to track and filter the modulation of the dithered clock train to generate a second clock train that is the spread spectrum of the first mentioned clock train.
申请公布号 US7221704(B2) 申请公布日期 2007.05.22
申请号 US20050246328 申请日期 2005.10.06
申请人 MARVELL WORLD TRADE LTD. 发明人 GREENBERG JODY
分类号 H04B17/00;H04Q1/20 主分类号 H04B17/00
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