发明名称 DELAY CIRCUIT APPLIED TO SEMICONDUCTOR MEMORY DEVICE HAVING AUTO POWER-DOWN FUNCTION
摘要 A delay circuit comprises a charge/discharge circuit and a logic circuit. The charge/discharge circuit is used to moderate a slope of change of an input signal. The logic circuit receives a charge/discharge signal output from the charge/discharge circuit, and is used to change an output signal of the logic circuit when the charge/discharge signal exceeds a threshold value of the logic circuit. A time constant in the charge/discharge circuit is varied in accordance with the change in the output signal of the logic circuit. This serves to alleviate the malfunctioning and timing constraint problems that occur after the threshold value of the next-stage circuit (logic circuit) is exceeded.
申请公布号 US2001043104(A1) 申请公布日期 2001.11.22
申请号 US19990306843 申请日期 1999.05.07
申请人 SUZUKI KOICHI 发明人 SUZUKI KOICHI
分类号 G11C19/28;G11C7/20;G11C7/22;G11C8/18;H03K5/13;H03K17/28;(IPC1-7):H03H11/26 主分类号 G11C19/28
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