| 摘要 |
An exemplary reset circuit includes a reset signal generator providing a first reset signal, an inverter, and a NAND gate. The inverter includes an input connected to the reset signal generator for receiving the first reset signal, and an output. The NAND gate includes a first input connected to the output of the inverter, a second input connected to a control terminal receiving a control signal, and an output. The reset circuit delivers a second reset signal at the output of the NAND gate in according to the first reset signal and the control signal. The reset circuit protects a system from accidental reset.
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