发明名称 |
Memory area protection system and methods |
摘要 |
In one embodiment, a non-volatile memory device includes a plurality of protection bits denoting that an area of memory in the device must be protected from being erased or programmed. The memory device further includes a majority logic circuit for determining the logic state of the majority of the plurality of protection bits. Another embodiment includes a pattern generator for generating the logic levels to be stored in the plurality of protection bits. |
申请公布号 |
US9406388(B2) |
申请公布日期 |
2016.08.02 |
申请号 |
US200711795358 |
申请日期 |
2007.05.10 |
申请人 |
Micron Technology, Inc. |
发明人 |
De Santis Luca;Gallese Maria Luisa;Imondi Giuliano Gennaro |
分类号 |
G11C16/22;G06F21/79 |
主分类号 |
G11C16/22 |
代理机构 |
Dorsey & Whitney LLP |
代理人 |
Dorsey & Whitney LLP |
主权项 |
1. A method of protecting a memory area comprising:
programming a plurality of memory cells with a predetermined level; computing a logical state of a majority of the plurality of memory cells; and preventing memory cells in the memory area from being programmed responsive to the logical state being a first value, wherein the logical state has the first value when the majority of the plurality of memory cells stores the predetermined level. |
地址 |
Boise ID US |