发明名称 Circuit arrangement for suppressing voltage/current peaks in inverter, has direct current voltage source with increased intermediate circuit potential, where source is activated between diode and intermediate circuit potential terminal
摘要 <p>The arrangement has an inverter whose output terminals (5) are controlled by an inductor (9). The terminals are associated to the positive and negative intermediate potentials by a capacitor (11) and a diode (15) and with respect to the potential of a direct current voltage intermediate circuit. A direct current (DC) voltage source (20) with increased intermediate circuit potential is activated between the diode and the intermediate circuit potential terminal.</p>
申请公布号 DE102005045552(A1) 申请公布日期 2007.04.12
申请号 DE20051045552 申请日期 2005.09.23
申请人 SIEMENS AG 发明人 BAUER, FRANZ
分类号 H02M1/12 主分类号 H02M1/12
代理机构 代理人
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