发明名称 METHOD FOR VERIFYING OPTICAL PROXIMITY EFFECT CORRECTION USING LAYOUT-TO-LAYOUT INSPECTION METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide a method for verifying optical proximity effect correction using a layout-to-layout inspection method that enables accurate and precise inspection of differences between an original design of a semiconductor device and a revised design of the semiconductor device and verification of accuracy of the optical proximity effect correction by considering exposure conditions. <P>SOLUTION: The method for verifying optical proximity effect correction includes steps of: performing optical proximity effect correction of an original design of a semiconductor device to prepare a revised design of the semiconductor device; comparing the original design of the semiconductor and the revised design of the semiconductor with each other; dividing deviation patterns, obtained by results of the comparison, according to an illumination system; and comparing the divided deviation patterns respectively to reference values to determine whether or not any error in the optical proximity effect correction occurs. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007086717(A) 申请公布日期 2007.04.05
申请号 JP20060027117 申请日期 2006.02.03
申请人 HYNIX SEMICONDUCTOR INC 发明人 MOON JAE IN
分类号 G03F1/36;G03F1/68;G03F1/70;G03F1/84;H01L21/027 主分类号 G03F1/36
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