| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a clock switching circuit for switching a clock without generating a hazard and a collapse of duty rate. <P>SOLUTION: This clock switching circuit is provided with a first synchronizing circuit 1 for synchronizing a clock selection signal SEL by a first clock CLK1; a second synchronizing circuit 2 for synchronizing the clock selection signal SEL synchronized by the first clock CLK1 by the first synchronizing circuit 1 by a second clock CLK1; and a clock selecting circuit 5 for outputting a "1"(high level) synchronously with the clock selection SEL synchronized by the first clock CLK1 by the first synchronizing circuit 1, and for selecting a second clock CLK 2 synchronously by the clock selection signal SEL synchronized by the second clock CLK2 by the second synchronizing circuit 2. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
