发明名称 MULTILAYER WIRING BOARD
摘要 <P>PROBLEM TO BE SOLVED: To provide a multilayer wiring board in which a hollow-out part is simply formed and electronic parts are mounted therein to be intended to make measures against static charge. <P>SOLUTION: First and second core substrates 20, 21 on which first to fourth wirings 22 to 25 are formed as a pattern are laminated via an insulating adhesive layer 26, a hollow-out part 27 is pierced vertically from the uppermost first core substrate 20 to the lowermost second core substrate 21, a receiver member 28 is disposed in the hollow-out part 27 so as to come into contact with the first wiring 22 on the upper face of the first core substrate 20, and a semiconductor chip 30 is mounted on the receiver member 28. Accordingly, the die bonding face of the semiconductor chip 30 can be connected to a wiring part of a reference potential in the first wiring 22 by the receiver member 28, thus being intended to make measures against static charge of the semiconductor chip 30. Additionally, as the hollow-out part 27 needs to be pierced vertically in the laminated first and second core substrates 20, 21, the hollow-out part 27 can simply be formed without requiring a high cutting technology. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007088135(A) 申请公布日期 2007.04.05
申请号 JP20050273586 申请日期 2005.09.21
申请人 CASIO COMPUT CO LTD 发明人 USUI NORIHISA
分类号 H05K3/46 主分类号 H05K3/46
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