| 摘要 |
A method for manufacturing an integrated circuit is provided to minimize a modification cost according to a change of a design of logic after an IC manufacturing process is performed. An integrated circuit includes a plurality of logic devices. A logic forming process is performed to form residual logic which is not connected with the plurality of logic devices. One or more via-holes or one or more deposition material layers are formed on the residual logic device when a logic device is formed on the residual logic. A pin is formed on a deposition material layer of a top surface of the residual logic device.
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