| 摘要 |
A pixel array comprises at least one row of pixels comprising pixels, preferably four-transistor types, which are reset by a first reset control line 131 and at least one pixel 70, preferably amounting to 1% of the array, charging a storage region during charge integration and reset by a second reset control line 133. Preferably a control circuit is provided to reset the first and second reset control lines 131, 133 at different times. Preferably the at least one pixel 70 is a three-transistor type, or can be four-transistor operated in a 3T mode, the transfer transistor always on in this instance. Preferably the at least one pixel 70 is used for automatic light control and has an output voltage with gain factor calculated from the ratio of the average output voltage of surrounding pixels to the output voltage of the pixel. Preferably the array is a colour array arranged in a Bayer pattern, pixels of one colour, preferably red, are used for automatic light control. The arrangement is also claimed independently providing most notably correlated double sampling functionality within the array. |
