| 摘要 |
A semiconductor device is provided to improve step coverage of an upper intermetal dielectric and an upper electrode by forming first and second trenches in the upper intermetal dielectric. An interlayer dielectric(110) is formed on a semiconductor substrate(100) having a conductive layer. A lower intermetal dielectric(120) is formed on the interlayer dielectric, having first and second contact holes(131,135). A metal interconnection(133) and an MIM(metal insulator metal) lower electrode(137) are formed on the first and the second contact holes, respectively. An etch stop layer(155) is formed on the lowe intermetal dielectric(140) and the metal interconnection. An upper intermetal dielectric includes first and second trenches(143,145). The first trench is positioned on the MIM lower electrode formed on the etch stop layer. The second trench is formed at the upper part of the first trench, broader than the first trench. A dielectric(150) is formed on the inner wall of the first and the second trenches. An MIM upper electrode(160) is formed on the dielectric existing on the first trench, lower than the upper surface of the upper intermetal dielectric. The second trench is wider and shallower than the first trench.
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