| 摘要 |
<p>A semiconductor testing apparatus in which measurement accuracy is prevented from being reduced and the number of to-be-tested devices that can be simultaneously measured is increased. The semiconductor testing apparatus has a driver DR for inputting a signal to a pin of DUTs (200), a signal line connected at one end to the output end of the driver DR and having connection points provided in the middle of the signal line, and a termination resistor (28) connected to the other end of the signal line. The connection points provided in the signal line are respectively connected to the DUTs (200).</p> |
