| 摘要 |
A novel addressing technique, aimed at reduced addressing time of a PDP panel is disclosed in the present invention. The invention uses new scanning voltage waveform, new voltage waveforms for bulk sustain and data electrodes, as well as discharges in all the pixels (both ON and OFF), which allows to significantly lower the voltage controlled by address drivers. Although elements of this technique can be used in any panel and in conjunction with many other methods of shortening the address period, the effectiveness of this technique depends on the geometrical parameters of a PDP cell.
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