| 摘要 |
A power metering apparatus meters a power signal in a powered system. A low-pass filter receives the power signal and outputs a filtered signal. The filter implements a corner frequency programmable based on a first clocking signal and anti-aliases high frequency components of the power signal. An A/D converter receives the filtered signal and outputs a digital signal. The A/D converter samples the filtered signal according to a system clock based on a second clocking signal. A clocking element generates and outputs each of the first clocking signal and the second clocking signal. The first clocking signal is synchronous with the second clocking signal.
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