发明名称 Method and module for universal test of communication ports
摘要 The present invention relates to a method and an universal module for testing functions of communication ports of a computer, including both parallel port and serial port. The module includes a logic control unit and connects to a communication port (a serial or a parallel port) for testing the open or short conditions of the ports through walk 1' and a walk 0' logic tests. The testing module not only can check the open condition of a parallel port, but also can check the open and short conditions of a parallel port and a serial port.
申请公布号 US7168019(B1) 申请公布日期 2007.01.23
申请号 US19990262960 申请日期 1999.03.04
申请人 INVENTEC CORP 发明人 CHANG YU-CHUAN;REN XUE-NING
分类号 G01R31/28;G06F7/02 主分类号 G01R31/28
代理机构 代理人
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