发明名称 A/D CONVERSION APPARATUS
摘要 PROBLEM TO BE SOLVED: To provide an A/D conversion apparatus capable of performing high-speed sampling operation with a high S/N ratio. SOLUTION: The A/D conversion apparatus 14 calculates the S/N ratio of a signal 204 after its conversion into a digital signal, and outputs a pulse 206 when this S/N ratio is not higher than a predetermined level. Each time when a pulse 206 is inputted, a clock controller 26 determines the amounts of delay of the clock CK1 of an A/D conversion portion 20 and the clock CK2 of a latch driver 22 from an input clock CLK respectively, and adjusts the clock skews of the clocks CK1 and CK2. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007013641(A) 申请公布日期 2007.01.18
申请号 JP20050192344 申请日期 2005.06.30
申请人 SANYO ELECTRIC CO LTD 发明人 SAKATA KOJI
分类号 H03M1/12 主分类号 H03M1/12
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