发明名称 Adaptation of the bit rate in a data-processing flow
摘要 <p>The module has an input data (di), an output data (do), a blocking input (doH), a blocking output (diH), and a processing unit (11) for executing a digital processing on the data presented on the data input and for applying processed data at the data output. The processing unit is adapted to generate a blocking request which is applied to the blocking input. A control unit (16) reproduces a blocking request on the blocking output and blocks the application of the processed data on the data output during the reception of the blocking request on the blocking input. Independent claims are also included for the following: (1) a data processing flow chain comprising data processing modules connected in series in the chain (2) a mobile telephony apparatus comprising a data processing flow chain.</p>
申请公布号 EP1742146(A1) 申请公布日期 2007.01.10
申请号 EP20060290994 申请日期 2006.06.19
申请人 STMICROELECTRONICS SA 发明人 RIES, GILLES;AGAESSE, JEAN-FRANCOIS
分类号 G06F5/06;H04Q7/32 主分类号 G06F5/06
代理机构 代理人
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