| 摘要 |
<p>A method for manufacturing a flash memory device is provided to reduce the coupling ratio between a floating gate and a control gate by forming a polysilicon layer without seam as the floating gate. Trenches are formed in a semiconductor substrate(10) having a screen oxide layer and a pad nitride layer. Isolation layers(15) are formed in the trenches. By removing the pad nitride layer and the screen oxide layer, the upper of the protrudent isolation layer is exposed. A tunnel oxide layer(16) and a polysilicon layer are sequentially formed on the exposed substrate. A floating gate(17) is then formed by CMP of the polysilicon layer and the protrudent isolation layer, wherein the polishing thickness of the polysilicon layer is 1/10 ~ 1/2 of the distance between adjacent isolation layers.</p> |
