发明名称 METHOD FOR FORMING DUAL DAMASCENE PATTERN IN SEMICONDUCTOR MANUFACTURING PROCESS
摘要 A method for forming a dual damascene pattern in a semiconductor manufacturing process is provided to remarkably reduce a manufacturing cost thereof by simplifying a process flow. A first dielectric layer(200) and a first conductive layer(202) are formed on a semiconductor substrate. A second dielectric layer(204) is formed on the first conductive layer, and a photoresist is applied on the second dielectric layer. The photoresist is exposed to radiation through a first mask that defines a wiring region(206a). The photoresist is exposed to radiation through a second mask that defines a via hole(206b). The photoresist is developed to form a photoresist pattern having a dual damascene structure, in which the damascene structure includes a via hole pattern and a wiring pattern. The via hole region and the wiring region are formed by anisotropically etching the second dielectric layer. The via hole region and the wiring region are filled with a second conductive layer after removing the photoresist pattern. A contact and a wiring are formed by removing the second conductive layer from outside of the via hole region and the wiring region.
申请公布号 KR100664807(B1) 申请公布日期 2007.01.04
申请号 KR20050078847 申请日期 2005.08.26
申请人 DONGBU ELECTRONICS CO., LTD. 发明人 KIM, YUNG PIL
分类号 H01L21/3205;H01L21/28 主分类号 H01L21/3205
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