发明名称 LEVEL SHIFT CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a level shift circuit of low power consumption and with excellent output responsiveness. SOLUTION: A resistive element R1 is connected between a second power terminal T2 and an output part OUT, and an N channel MOS transistor Q1 is connected between the output part OUT and a ground terminal TG. A P channel MOS transistor Q2 is connected in parallel with the resistive element R1 between the second power terminal T2 and the output part OUT. A gate electrode of the N channel MOS transistor Q1 is connected to an input part IP, and an output part of an inverter NOT 1 is connected to the input part IP. In addition, a resistive element R2 and a capacitor C1 are connected in series between the second power terminal T2 and the input part IP in order from the side of the second terminal T2, and a gate electrode of the P channel MOS transistor Q2 is connected to a connection node between the resistive element R2 and the capacitor C1. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006352502(A) 申请公布日期 2006.12.28
申请号 JP20050175902 申请日期 2005.06.16
申请人 RENESAS TECHNOLOGY CORP 发明人 KUROIWA TATSURO;HONDA KATSUMI
分类号 H03K19/0185 主分类号 H03K19/0185
代理机构 代理人
主权项
地址
您可能感兴趣的专利