发明名称 Interconnect metallization structure for integrated circuit device
摘要 A multilayer interconnect structure for an integrated circuit device using copper technology has an interconnect structure formed in the aluminium contact pad layer. The process for forming the IC device comprises forming one or more interconnect levels overlying a substrate, and forming a bond pad level. The bond pad level comprises a plurality of contact pads 220, 228, 245 and aluminium interconnects 284, 294 configured to connect underlying levels of copper interconnect 280, 282, 250, 292 to one another to provide signal routing. Also provided are interconnects configured to transfer power from the contact pads 220 228 245 to underlying interconnect levels 222, 223, 230, 238. Thus a power bus interconnect may also be formed in the same layer as the aluminium contact pad.
申请公布号 GB2427074(A) 申请公布日期 2006.12.13
申请号 GB20060015199 申请日期 2004.03.03
申请人 AGERE SYSTEMS INC 发明人 MICHAEL C AYUKAWA;SEUNG H KANG;ROLAND P KREBS;KURT GEORGE STEINER;SAILESH MANSINH MERCHANT
分类号 H01L23/52;H01L23/528;H01L21/3205;H01L21/768;H01L21/82;H01L23/532 主分类号 H01L23/52
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