| 摘要 |
A capacitor structure for an integrated circuit having at least first, second and third layers, with each layer having first and second conductors, includes multiple sidewall capacitors formed between sidewalls of the first conductor and the second conductor in each layer. Several inter-layer capacitors are formed between the first and second conductors in the first and second layers. Further, via capacitors are formed between sidewalls of adjacent vias corresponding to different conductors. The vias are formed between the second and third layers.
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