DFT TECHNIQUE FOR STRESSING SELF-TIMED SEMICONDUCTOR MEMORIES TO DETECT DELAY FAULTS,申请号EP20050708935-传众专利搜索

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发明名称	DFT TECHNIQUE FOR STRESSING SELF-TIMED SEMICONDUCTOR MEMORIES TO DETECT DELAY FAULTS
摘要
申请公布号	EP1728255(A1)	申请公布日期	2006.12.06
申请号	EP20050708935	申请日期	2005.03.03
申请人	KONINKLIJKE PHILIPS ELECTRONICS N.V.	发明人	AZIMANE, MOHAMED;MAJHI, ANANTA
分类号	G11C29/00;G11C29/14;G11C29/48;G11C29/50	主分类号	G11C29/00
代理机构		代理人
主权项
地址

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