发明名称 |
Semiconductor integrated circuit device and process for manufacturing the same |
摘要 |
In a peripheral circuit region of a DRAM, two connection holes, for connecting a first layer line and a second layer line electrically are opened separately in two processes. After forming the connection holes, plugs are formed in the respective connection holes.
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申请公布号 |
US7145193(B2) |
申请公布日期 |
2006.12.05 |
申请号 |
US20020470573 |
申请日期 |
2002.08.29 |
申请人 |
HITACHI, LTD. |
发明人 |
NAKAMURA YOSHITAKA;ASANO ISAMU;KAWAKITA KEIZOU;YAMADA SATORU |
分类号 |
H01L27/108;H01L21/768;H01L21/8242;H01L23/522 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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