发明名称 AN APPARATUS AND METHOD FOR AN ITERATIVE CRYPTOGRAPHIC BLOCK
摘要 A method and apparatus for an iterative cryptographic block under the control of a CPU and without a fixed number of stages. In one embodiment, a first cryptographic block descrambles received information using an internal key or a preprogrammed key to form a descrambled key or descrambled data. A data feedback path stores the descrambled data as internal data and provides the internal data or the external data as data input to the first cryptographic block. A key feedback path stores the descrambled key as an internal key and provides the internal key or the preprogrammed key to a key input of the first cryptographic block. A second cryptographic block descrambles received content using a final descrambling key. Other embodiments are described and claimed.
申请公布号 KR20060123063(A) 申请公布日期 2006.12.01
申请号 KR20067003631 申请日期 2004.07.07
申请人 SONY ELECTRONICS, INC. 发明人 CANDELORE BRANT
分类号 H04N5/913;G06F21/00;G11B20/10;H04N7/16;H04N7/167 主分类号 H04N5/913
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