| 摘要 |
The memory has memory cells each having an access transistor and a floating gate transistor. A word line decoder (10) is connected to word lines of the memory cells by a selection line connected to gate terminals of the access transistors of the word line. The word line decoder is connected to word lines of the memory cells by a control gate line connected to the control gates of the floating gate transistors of the word line. An independent claim is also included for a method of selecting memory cells in an electrically erasable and programmable memory.
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