| 摘要 |
<p>A data signal timing correcting device has a timing difference detecting circuit that detects a direction and magnitude of a timing shift of a data signal relative to a reference clock signal by calculating a difference between a number of reference signal clock pulses and one symbol of the data signal. A timing correction circuit receives a detection result from the timing difference detecting circuit and provides a trigger signal to a data memory that has stored in it the data signal. A counter loads a value of the difference from the different detecting circuit and, depending upon the magnitude and direction of a detected timing shift, the trigger signal is shifted to an earlier or later timing by one clock pulse of the reference clock signal.</p> |
