| 摘要 |
A test circuit and method of a semiconductor memory device, and a semiconductor memory device including the same are provided to perform accurate test even when all bits of test data are inverted, by performing even bit data reading and odd bit data reading at the same time only by using one pattern in a high speed clock test mode. A data comparator(120) compares a first output data with a second output data outputted from an output buffer circuit, and generates a comparison signal by determining whether the logic states of the first and second output data are equal. A signal alignment unit(130) generates a plurality of test signals by aligning the first output data and the comparison signal in response to a clock signal, and the test signals are divided into even bit test data, odd bit test data, even bit comparison test data and odd bit comparison test data.
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