摘要 |
<p>An integrated circuit comprises an error detection circuit 3230-1 to 3230-4 operable to detect a transition in the signal value in a predetermined time window, which is indicative of an error in operation of the integrated circuit. The integrated circuit also comprises a storage unit 3296 operable to store a recoverable state of the data processing apparatus comprising at least a subset of architectural state variables corresponding to a programmer's model of the integrated circuit. An error recovery circuit 3250, 3260,3210 is provided as part of the integrated circuit and this serves to enable the integrated circuit to recover from detected errors in operation using the stored recoverable state from the storage unit 3296. An operational parameter controller 3242 of the integrated circuit adjusts the operating parameters of the integrated circuit, such as the clock frequency, the operating voltage, the body biased voltage, temperature in dependence upon one or more characteristics of detected errors in operation so as to maintain a finite non-zero error rate in a manner that increases overall performance.</p> |
申请人 |
ARM LIMITED;UNIVERSTY OF MICHIGAN;BLAAUW, DAVID, THEODORE;BULL, DAVID, MICHAEL;DAS, SHIDHARTHA |
发明人 |
BLAAUW, DAVID, THEODORE;BULL, DAVID, MICHAEL;DAS, SHIDHARTHA |